A connection device capable of converting a pixel clock to a character clock comprises a pixel generator, a frequency divider, and a logic unit. The pixel generator generates a pixel clock having a number of cycles that is not an integer multiple of a first number during a predetermined interval. The frequency divider connected to the pixel clock generator generates a character clock according to the pixel clock. The logic unit connected to the pixel clock generator and the frequency divider is used for controlling the frequency divider to generate the character clock by dividing the number of cycles of the pixel clock during part of the predetermined interval by the first number and by dividing the number of cycles of the pixel clock during the remaining part of the predetermined interval by a second number.