Invention Grant
- Patent Title: Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof
- Patent Title (中): 能够稳定光刻工艺参数的多层半导体集成电路，所使用的光掩模及其制造方法
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Application No.: US10284327Application Date: 2002-10-31
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Publication No.: US07241558B2Publication Date: 2007-07-10
- Inventor: Chong-Jen Huang , Hsin-Huei Chen , Kuang-Wen Liu , Chih-Hao Wang , Jia-Rong Chiou
- Applicant: Chong-Jen Huang , Hsin-Huei Chen , Kuang-Wen Liu , Chih-Hao Wang , Jia-Rong Chiou
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Rosenberg, Klein & Lee
- Main IPC: G03C5/00
- IPC: G03C5/00
Abstract:
Stabilization of photolithography process parameters, the photomask being used, and the manufacturing method thereof is provided where a formal pattern layout is combined with a dummy pattern. A photomask is manufactured by utilizing the combined pattern layout so that density changes between the pattern structure layers of the multi-layer semiconductor integrated circuits are minimized.
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