发明授权
US07262999B2 System and method for preventing read margin degradation for a memory array
有权
用于防止存储器阵列的读取容限劣化的系统和方法
- 专利标题: System and method for preventing read margin degradation for a memory array
- 专利标题(中): 用于防止存储器阵列的读取容限劣化的系统和方法
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申请号: US10997114申请日: 2004-11-24
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公开(公告)号: US07262999B2公开(公告)日: 2007-08-28
- 发明人: Jian-Yuan Shen , Hsien-Wen Hsu , Chi-Ling Chu
- 申请人: Jian-Yuan Shen , Hsien-Wen Hsu , Chi-Ling Chu
- 申请人地址: TW
- 专利权人: Macronix International Co., Ltd.
- 当前专利权人: Macronix International Co., Ltd.
- 当前专利权人地址: TW
- 代理机构: Martine Penilla & Gencarella, LLP
- 主分类号: G11C16/06
- IPC分类号: G11C16/06 ; G11C16/04
摘要:
An ultra cycling nitride read only memory (NROM) device is coupled to a NROM array such that both bits of the ultra cycling NROM device will be erased when all NROM devices of the NROM array are erased. The ultra cycling NROM device is then programmed at its right bit. A threshold voltage difference will be obtained for the ultra cycling NROM device for the un-programmed left bit. Next, a cycling number is obtained based on the threshold voltage difference for the ultra cycling NROM device. A threshold voltage shift can be found based on the cycling number for the NROM array. Finally, an erase voltage will be calculated according to the threshold voltage shift for the NROM array. If the NROM array is programmed again, the erase voltage will be applied to un-programmed NROM devices of the NROM array to further reduce the threshold voltages.
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