发明授权
- 专利标题: LVDS output buffer pre-emphasis methods and apparatus
- 专利标题(中): LVDS输出缓冲预加重方法和装置
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申请号: US11189348申请日: 2005-07-26
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公开(公告)号: US07265587B1公开(公告)日: 2007-09-04
- 发明人: Bee Yee Ng , Choong Kit Wong , Boon Jin Ang
- 申请人: Bee Yee Ng , Choong Kit Wong , Boon Jin Ang
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Ropes & Gray, LLP
- 代理商 Robert R. Jackson; Chia-Hao La
- 主分类号: H03K19/0175
- IPC分类号: H03K19/0175
摘要:
Methods and apparatus are provided for performing pre-emphasis of signals using buffer circuitry that is not dedicated to LVDS transmission. In an embodiment of the invention, pre-emphasis circuitry is provided to enable unused transistors of the buffer circuitry to increase the current that can be driven onto output signal lines, resulting in sharper signal transitions and improved signal integrity. In addition, circuitry can be provided that limits the duration of the pre-emphasis to a selected period of time, thereby conserving power and limiting the differential voltage between a given pair of transmitted signals.
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