Invention Grant
US07266161B1 Efficient method and apparatus for parallel processing for use with high-speed single-bit sampling 有权
用于高速单位采样的并行处理的高效方法和装置

  • Patent Title: Efficient method and apparatus for parallel processing for use with high-speed single-bit sampling
  • Patent Title (中): 用于高速单位采样的并行处理的高效方法和装置
  • Application No.: US10606724
    Application Date: 2003-06-26
  • Publication No.: US07266161B1
    Publication Date: 2007-09-04
  • Inventor: Billy D. HartSteven L. White
  • Applicant: Billy D. HartSteven L. White
  • Applicant Address: US IA Cedar Rapids
  • Assignee: Rockwell Collins, Inc.
  • Current Assignee: Rockwell Collins, Inc.
  • Current Assignee Address: US IA Cedar Rapids
  • Agent Nathan O. Jensen; Kyle Eppele
  • Main IPC: H03D3/00
  • IPC: H03D3/00
Efficient method and apparatus for parallel processing for use with high-speed single-bit sampling
Abstract:
An apparatus and method provides efficient parallel processing for use with a single-bit sampler that provides single-bit samples at a high sample rate. A serial-to-parallel converter converts the single-bit samples into parallel single-bit samples at a reduced sample rate. A digital quadrature mix performs a frequency shift to the parallel single-bit samples and simultaneously performs a real-to-complex conversion of the parallel single-bit samples from the serial-to-parallel converter to provide parallel I and Q output values at an intermediate frequency. The serial-to-parallel converter has shift register stages that provide a memory for use in functional realization of a boxcar filter and decimation-by-two in the digital quadrature mix. The digital quadrature mix utilizes logic to route and invert the parallel single-bit samples resulting in the parallel I and Q single-bit output values. Additional filter and decimate stages may be used to process the parallel I and Q single-bit output values.
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