发明授权
US07271047B1 Test structure and method for measuring the resistance of line-end vias
失效
用于测量线端通孔电阻的测试结构和方法
- 专利标题： Test structure and method for measuring the resistance of line-end vias
- 专利标题（中）： 用于测量线端通孔电阻的测试结构和方法
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申请号： US11327641申请日： 2006-01-06
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公开(公告)号： US07271047B1公开(公告)日： 2007-09-18
- 发明人: Jianhong Zhu , Mark Michael , David Wu
- 申请人： Jianhong Zhu , Mark Michael , David Wu
- 申请人地址： US CA Sunnyvale
- 专利权人： Advanced Micro Devices, Inc.
- 当前专利权人： Advanced Micro Devices, Inc.
- 当前专利权人地址： US CA Sunnyvale
- 代理商 Timothy M. Honeycutt
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238
摘要：
A test structure and methods of using and making the same are provided. In one aspect, a test structure is provided that includes a first conductor that has a first end and a second conductor that has a second end positioned above the first end. A third conductor is positioned between the first end of the first conductor and the second end of the second conductor. A first electrode is coupled to the first conductor at a first distance from the third conductor and a second electrode coupled to the first conductor at a second distance from the third conductor. A third electrode is coupled to the second conductor at a third distance from the third conductor and a fourth electrode is coupled to the second conductor at a fourth distance from the third conductor. The first through fourth electrodes provide voltage sense taps and the first and second conductors provide current sense taps from which the resistance of the third conductor may be derived.
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