发明授权
- 专利标题: Edge incremental redundancy memory structure and memory management
- 专利标题(中): 边增量冗余内存结构和内存管理
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申请号: US10731804申请日: 2003-12-09
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公开(公告)号: US07272768B2公开(公告)日: 2007-09-18
- 发明人: Li Fung Chang , Yongqian Wang
- 申请人: Li Fung Chang , Yongqian Wang
- 申请人地址: US CA Irvine
- 专利权人: Broadcom Corporation
- 当前专利权人: Broadcom Corporation
- 当前专利权人地址: US CA Irvine
- 代理机构: Garlick Harrison & Markison
- 代理商 Bruce E. Garlick
- 主分类号: H03M13/00
- IPC分类号: H03M13/00
摘要:
A system for implementing Incremental Redundancy (IR) operations in a wireless receiver includes at least one processing device, an IR processing function, and IR memory. The at least one processing device is operable to receive analog signals corresponding to a data block, to sample the analog signals to produce samples, to equalize the samples to produce soft decision bits corresponding to the data block, and to initiate IR operations. The IR processing function is operable to perform IR operations on the soft decision bits of the data block in an attempt to correctly decode the data block. The IR memory operably couples to the IR processing function, includes Type I IR memory adapted to store IR status information of the data block, and includes Type II IR memory adapted to store the data block.
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