发明授权
- 专利标题: Thin film transistor array panel
- 专利标题(中): 薄膜晶体管阵列面板
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申请号: US11234470申请日: 2005-09-23
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公开(公告)号: US07276732B2公开(公告)日: 2007-10-02
- 发明人: Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
- 申请人: Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
- 申请人地址: KR Suwon-Si, Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-Si, Gyeonggi-do
- 代理机构: MacPherson Kwok Chen & Heid LLP
- 优先权: KR10-2004-0076813 20040924
- 主分类号: H01L29/04
- IPC分类号: H01L29/04
摘要:
A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.
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