发明授权
- 专利标题： Shallow trench isolation method
- 专利标题（中）： 浅沟隔离法
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申请号： US10899663申请日： 2004-07-27
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公开(公告)号： US07279397B2公开(公告)日： 2007-10-09
- 发明人: Manoj Mehrotra , Amitava Chatterjee
- 申请人： Manoj Mehrotra , Amitava Chatterjee
- 申请人地址： US TX Dallas
- 专利权人： Texas Instruments Incorporated
- 当前专利权人： Texas Instruments Incorporated
- 当前专利权人地址： US TX Dallas
- 代理商 Peter K. McLarty; W. James Brady, III; Frederick J. Telecky, Jr.
- 主分类号： H01L21/76
- IPC分类号： H01L21/76
摘要：
A method (200) of forming an isolation structure is presented, in which a hard mask layer (304, 308) is formed (204, 206) over the isolation and active regions (305, 303) of a semiconductor body (306), and a dopant is selectively provided to a portion of the active region (303) proximate the isolation region (305) to create a threshold voltage compensation region (318). After the compensation region (318) is created, the hard mask layer (304, 308) is patterned (218) to create a patterned hard mask. The patterned hard mask is then used in forming (222) a trench (323) in the isolation region (305) near the compensation region (318), and the trench (323) is then filled (224) with a dielectric material (338).
公开/授权文献
- US20060024909A1 Shallow trench isolation method 公开/授权日：2006-02-02
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