发明授权
US07282967B2 Fixed frequency clock output having a variable high frequency input clock and an unrelated fixed frequency reference signal
有权
具有可变高频输入时钟和不相关的固定频率参考信号的固定频率时钟输出
- 专利标题: Fixed frequency clock output having a variable high frequency input clock and an unrelated fixed frequency reference signal
- 专利标题(中): 具有可变高频输入时钟和不相关的固定频率参考信号的固定频率时钟输出
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申请号: US10696811申请日: 2003-10-30
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公开(公告)号: US07282967B2公开(公告)日: 2007-10-16
- 发明人: Douglas Gene Keithley , Richard D. Taylor , Mark D. Montierth
- 申请人: Douglas Gene Keithley , Richard D. Taylor , Mark D. Montierth
- 申请人地址: SG Singapore
- 专利权人: Avago Technologies General IP ( Singapore) Pte. Ltd.
- 当前专利权人: Avago Technologies General IP ( Singapore) Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: H03B21/00
- IPC分类号: H03B21/00
摘要:
A digital circuit generates very precise clock frequencies for applications that can tolerate a small degree of jitter but require exact long term frequencies, e.g. a video clock for a laser printer. Some subpixel jitter is acceptable, but the overall pixel rate remains exact and consistent. In some applications, the jitter may be desirable to smear the EMI spectrum. For example, if the high frequency input clock is modulated, the edges of the video clock will also be modulated yet remain within the jitter and frequency specification.
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