Invention Grant
- Patent Title: Manufacturing method of a multilayer printed wiring board
- Patent Title (中): 多层印刷线路板的制造方法
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Application No.: US11002135Application Date: 2004-12-03
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Publication No.: US07290333B2Publication Date: 2007-11-06
- Inventor: Isao Matsui
- Applicant: Isao Matsui
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion Pllc.
- Priority: JP2001-316001 20011012
- Main IPC: H01K3/10
- IPC: H01K3/10

Abstract:
A conductive film has a plurality of clearances (openings) and a plurality of auxiliary clearances. The plurality of clearances and the plurality of auxiliary clearances are formed to have such numerical apertures and locations that generate no bias in the distribution of conductive film in consideration of the entire conductive film. The conductive film can disperse stress caused by thermal expansion etc., to ease by having the plurality of clearances and the plurality of auxiliary clearances. Accordingly, the conductive film is less prone to being peeled off the insulating film. Further, since the distribution of conductive film is substantially uniform as a whole, the transfer characteristics that are fixed by the distribution become substantially uniform as a whole.
Public/Granted literature
- US20050092518A1 Multilayer printed wiring board and its manufacturing method Public/Granted day:2005-05-05
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