发明授权
- 专利标题: Semiconductor substrate, semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device
- 专利标题(中): 半导体衬底,半导体器件,半导体衬底的制造方法以及半导体器件的制造方法
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申请号: US11393213申请日: 2006-03-29
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公开(公告)号: US07294539B2公开(公告)日: 2007-11-13
- 发明人: Kei Kanemoto
- 申请人: Kei Kanemoto
- 申请人地址: JP Tokyo
- 专利权人: Seiko Epson Corporation
- 当前专利权人: Seiko Epson Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Edwards Angell Palmer & Dodge LLP
- 代理商 John J. Penny, Jr.
- 优先权: JP2005-094368 20050329
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/84
摘要:
A method of manufacturing a semiconductor device, includes: forming an insulating layer on a single crystal semiconductor substrate; forming a non-crystalline semiconductor layer on the insulating layer; forming an insulating film on the non-crystalline semiconductor layer; forming an opening section for exposing a part of a surface of the single crystal semiconductor substrate through the insulating film, the non-crystalline semiconductor layer and the insulating layer; forming a single crystal semiconductor layer embedded in the opening section so as to have contact with the non-crystalline semiconductor layer; removing the insulating film and the insulating layer while the single crystal semiconductor layer supporting the non-crystalline semiconductor layer above the single crystal semiconductor substrate; forming a single-crystallized semiconductor layer obtained by single-crystallizing the non-crystalline semiconductor layer using the single crystal semiconductor layer as a seed by providing a thermal treatment on the non-crystalline semiconductor layer from which the insulating film and the insulating layer are removed; filling a gap between the single-crystallized semiconductor layer and the single crystal semiconductor substrate with an embedded insulating layer; forming a gate electrode on the single-crystallized semiconductor layer; and forming in the single-crystallized semiconductor layer a source layer disposed on one side of the gate electrode and a drain layer disposed on the other side of the gate electrode.
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