发明授权
- 专利标题: Semiconductor manufacturing method using two-stage annealing
- 专利标题(中): 半导体制造方法采用两阶段退火
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申请号: US10867766申请日: 2004-06-16
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公开(公告)号: US07300832B2公开(公告)日: 2007-11-27
- 发明人: Takayuki Ito , Kyoichi Suguro
- 申请人: Takayuki Ito , Kyoichi Suguro
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- 优先权: JPP2002-216807 20020725
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A method of semiconductor device manufacture provided includes forming a gate insulating layer upon a single crystal semiconductor substrate, forming a gate electrode made from a polycrystal conductive film upon the gate insulating layer, implanting impurity in the gate electrode and in the surface layer of the semiconductor substrate adjacent to or separate from the gate electrode, performing a first heat treatment, and performing a second heat treatment. The first heat treatment performs heat treatment at a temperature that diffuses the impurity implanted mainly in the gate electrode and controls the diffusion of the impurity implanted in the surface layer of the semiconductor substrate. The second heat treatment performs heat treatment at a higher temperature and for a shorter time than the first heat treatment, and at a temperature that activates the impurity implanted in the semiconductor substrate.
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