发明授权
- 专利标题: Methods and apparatus for multi-processor pipeline parallelism
- 专利标题(中): 多处理器管道并行性的方法和装置
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申请号: US11108959申请日: 2005-04-19
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公开(公告)号: US07302554B2公开(公告)日: 2007-11-27
- 发明人: Takeshi Yamazaki
- 申请人: Takeshi Yamazaki
- 申请人地址: JP
- 专利权人: Sony Computer Entertainment Inc.
- 当前专利权人: Sony Computer Entertainment Inc.
- 当前专利权人地址: JP
- 代理机构: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- 主分类号: G06F9/30
- IPC分类号: G06F9/30
摘要:
A processor is provided which has a modular organization including at least one local store operable to store data and instructions for execution, at least one functional unit operable to execute instructions on data provided from the local store, and at least one issue logic unit operable to convert instructions provided from the local store into operations of the functional unit for executing the instructions. The at least one issue logic unit may be operable to decode a unitary instruction provided from the local store to simultaneously operate all of the functional units according to the unitary instruction. Each issue logic unit may be operable to decode multiple instructions to separately operate first and second subsets of the plurality of functional units according to respective ones of the multiple instructions.