发明授权
US07305567B1 Decoupled architecture for data ciphering operations 有权
用于数据加密操作的解耦架构

Decoupled architecture for data ciphering operations
摘要:
In one embodiment, an apparatus comprises a microcontroller unit to store instructions into an execution queue. The apparatus also comprises an execution queue unit to generate a widely decoded functional execution instruction based on at least one instruction stored in the execution queue. Additionally, the apparatus comprises a functional unit to execute the widely decoded functional execution instruction asynchronous to the generation of the widely decoded functional execution instruction.
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