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US07313739B2 Method and apparatus for testing embedded cores 有权
嵌入式核心测试方法和装置

Method and apparatus for testing embedded cores
摘要:
Testing memory devices. An apparatus may include a test module operative to perform a test on a plurality of pipelined memory elements and a fail trace module operative to interrupt the test in response to identifying a failure of a memory element and to store an address of said memory element in a storage unit.
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