A resistless lithography method for fabricating fine stiuctures is disclosed. IN an embodiment, a semiconductor mask layer (HM) may be formed on a carrier material (TM, HM′) and a selective ion implantation (I) being effected in order to dope selected regions (1) of the semiconductor mask layer (HM). Wet chemical removal of the non doped regions of the semiconductor mask layer (HM) yields a semiconductor mask which can be used for further patterning. A simple and high precision resistless lithography method for structures smaller than 100 nm is obtained in this way.