A non-volatile memory cell and a method of manufacturing the same are provided. The non-volatile memory cell includes a semiconductor substrate, a floating gate over the semiconductor substrate, a first, a second, and a third capacitor each having a first plate and sharing a common floating gate as a second plate. The non-volatile memory cell further includes a transistor connected in series with the first capacitor. The gate electrode of the transistor is connected to a wordline of a memory array, and a source/drain region is connected to a bitline.