发明授权
US07334147B1 Method and architecture for synchronizing a path generator and/or extractor to a processor
有权
将路径生成器和/或提取器同步到处理器的方法和架构
- 专利标题: Method and architecture for synchronizing a path generator and/or extractor to a processor
- 专利标题(中): 将路径生成器和/或提取器同步到处理器的方法和架构
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申请号: US10254103申请日: 2002-09-24
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公开(公告)号: US07334147B1公开(公告)日: 2008-02-19
- 发明人: S. Babar Raza
- 申请人: S. Babar Raza
- 申请人地址: US CA San Jose
- 专利权人: Cypress Semiconductor Corporation
- 当前专利权人: Cypress Semiconductor Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H04L7/00
- IPC分类号: H04L7/00 ; H04J3/06
摘要:
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to synchronize at least one transport overhead byte with a pulse on an external pin. The second circuit may be configured to synchronize the transport overhead byte to the overhead processor. The overhead processor may be synchronized with (i) an overhead generator and (ii) an overhead extractor.
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