Invention Grant
US07336502B1 High-speed router with backplane using tuned-impedance thru-holes and vias
有权
具有背板的高速路由器使用调谐阻抗通孔和通孔
- Patent Title: High-speed router with backplane using tuned-impedance thru-holes and vias
- Patent Title (中): 具有背板的高速路由器使用调谐阻抗通孔和通孔
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Application No.: US10454735Application Date: 2003-06-03
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Publication No.: US07336502B1Publication Date: 2008-02-26
- Inventor: Joel R. Goergen
- Applicant: Joel R. Goergen
- Applicant Address: US CA San Jose
- Assignee: Force10 Networks, Inc.
- Current Assignee: Force10 Networks, Inc.
- Current Assignee Address: US CA San Jose
- Agent James E Harris
- Main IPC: H01R12/16
- IPC: H01R12/16

Abstract:
A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. Specific via designs reduce differential signal distortion due to the via pair, allowing the backplane to operate reliably at differential signal rates in excess of 3 Gigabits per second. In particular, each via passes through nonfunctional conductive pads on selected digital ground plane layers, the pads separated from the remainder of its ground plane layer by a clearance, thereby modifying the impedance of the via and reducing reflections from the stubs created by the via.
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