发明授权
US07337426B2 Pattern correcting method, mask making method, method of manufacturing semiconductor device, pattern correction system, and computer-readable recording medium having pattern correction program recorded therein
失效
图案校正方法，掩模制作方法，制造半导体器件的方法，图案校正系统以及其中记录有图案校正程序的计算机可读记录介质
- 专利标题： Pattern correcting method, mask making method, method of manufacturing semiconductor device, pattern correction system, and computer-readable recording medium having pattern correction program recorded therein
- 专利标题（中）： 图案校正方法，掩模制作方法，制造半导体器件的方法，图案校正系统以及其中记录有图案校正程序的计算机可读记录介质
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申请号： US11115187申请日： 2005-04-27
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公开(公告)号： US07337426B2公开(公告)日： 2008-02-26
- 发明人: Toshiya Kotani , Shigeki Nojima , Kazuhito Kobayashi
- 申请人： Toshiya Kotani , Shigeki Nojima , Kazuhito Kobayashi
- 申请人地址： JP Tokyo
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Tokyo
- 代理机构： Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- 优先权： JP2004-134010 20040428
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
There is disclosed a pattern correcting method comprising extracting a correction pattern, at least the one or more correction patterns being included in a first design pattern formed on a substrate, acquiring layout information from the first design pattern, the layout information affecting a finished plane shape of the correction pattern on the substrate, determining contents of correction onto the correction pattern on the basis of the layout information, generating a design pattern-2 corresponding to the layout information so as to be associated with the correction pattern, and correcting the correction pattern in accordance with the contents of correction corresponding to the design pattern-2.
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