Invention Grant
- Patent Title: Integrated circuit having a top side wafer contact and a method of manufacture therefor
- Patent Title (中): 具有顶侧晶片接触的集成电路及其制造方法
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Application No.: US11195283Application Date: 2005-08-02
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Publication No.: US07345343B2Publication Date: 2008-03-18
- Inventor: Tony T. Phan , William C. Loftin , John Lin , Philip L. Hower
- Applicant: Tony T. Phan , William C. Loftin , John Lin , Philip L. Hower
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent W. James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/84
- IPC: H01L21/84

Abstract:
The present invention provides an integrated circuit and a method of manufacture therefore. The integrated circuit (100, 1000), in one embodiment without limitation, includes a dielectric layer (120, 1020) located over a wafer substrate (110, 1010), and a semiconductor substrate (130, 1030) located over the dielectric layer (120, 1020), the semiconductor substrate (130, 1030) having one or more transistor devices (140, 1040) located therein or thereon. The integrated circuit (100, 1000) may further include an interconnect (170, 1053) extending entirely through the semiconductor substrate (130, 1030) and the dielectric layer (120, 1020), thereby electrically contacting the wafer substrate (110, 1010).
Public/Granted literature
- US20070029611A1 Integrated circuit having a top side wafer contact and a method of manufacture therefor Public/Granted day:2007-02-08
Information query
IPC分类: