发明授权
- 专利标题: Hardware co-simulation breakpoints in a high-level modeling system
- 专利标题(中): 硬件共模拟断点在高级建模系统中
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申请号: US10930619申请日: 2004-08-31
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公开(公告)号: US07346481B1公开(公告)日: 2008-03-18
- 发明人: Jonathan B. Ballagh , Roger B. Milne , Nabeel Shirazi , Jeffrey D. Stroomer
- 申请人: Jonathan B. Ballagh , Roger B. Milne , Nabeel Shirazi , Jeffrey D. Stroomer
- 申请人地址: US CA San Jose
- 专利权人: Xilinx, Inc.
- 当前专利权人: Xilinx, Inc.
- 当前专利权人地址: US CA San Jose
- 代理商 LeRoy D. Maunu; Kim Kanzaki
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Various approaches for controlling simulation of an electronic system are disclosed. In one approach, at least one breakpoint block is instantiated in a high-level design. The breakpoint block has an associated breakpoint condition driven by at least one signal of the design, and the design further includes at least one simulation block and at least one co-simulation block. The simulation block is simulated on a software-based simulation platform, and the co-simulation block and the breakpoint block are co-simulated on a hardware-based co-simulation platform. Advancement of a clock signal to the co-simulation block on the hardware-based co-simulation platform is inhibited in response to satisfaction of the breakpoint condition. After inhibiting the clock signal, advancement of steps of the clock signal is controlled on the co-simulation platform in one of a plurality of user-selectable clock advancement modes.
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