Invention Grant
- Patent Title: Twin MONOS array for high speed application
- Patent Title (中): 双MONOS阵列用于高速应用
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Application No.: US11215528Application Date: 2005-08-30
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Publication No.: US07352033B2Publication Date: 2008-04-01
- Inventor: Kimihiro Satoh , Tomoko Ogura , Ki-Tae Park , Nori Ogura , Yoshitaka Baba
- Applicant: Kimihiro Satoh , Tomoko Ogura , Ki-Tae Park , Nori Ogura , Yoshitaka Baba
- Applicant Address: US OR Hillsboro
- Assignee: Halo LSI Inc.
- Current Assignee: Halo LSI Inc.
- Current Assignee Address: US OR Hillsboro
- Agency: Saile Ackerman LLC
- Agent Stephen B. Ackerman; Rosemary L. S. Pike
- Main IPC: H01L29/772
- IPC: H01L29/772
Abstract:
The invention provides a metal bit structure of Twin MONOS memory cell with large channel width and its operational method for high-speed applications using a metal bit array.
Public/Granted literature
- US20070047309A1 Twin MONOS array for high speed application Public/Granted day:2007-03-01
Information query
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