发明授权
US07352163B2 Early effect cancelling circuit, differential amplifier, linear regulator, and early effect canceling method
有权
早期效应消除电路，差分放大器，线性稳压器和早期效应消除方法
- 专利标题： Early effect cancelling circuit, differential amplifier, linear regulator, and early effect canceling method
- 专利标题（中）： 早期效应消除电路，差分放大器，线性稳压器和早期效应消除方法
-
申请号： US11132172申请日： 2005-05-19
-
公开(公告)号： US07352163B2公开(公告)日： 2008-04-01
- 发明人: Yoshihiro Kizaki , Katsuyuki Yasukouchi , Hidenobu Ito
- 申请人： Yoshihiro Kizaki , Katsuyuki Yasukouchi , Hidenobu Ito
- 申请人地址： JP Kawasaki
- 专利权人： Fujitsu Limited
- 当前专利权人： Fujitsu Limited
- 当前专利权人地址： JP Kawasaki
- 代理机构： Arent Fox LLP
- 优先权： JP2005-051250 20050225
- 主分类号： G05F3/04
- IPC分类号： G05F3/04 ; G05F3/08
摘要：
In an input transistor of current mirror circuit, it is intended to prevent the current generated by Early effects from appearing in the output current of the current mirror circuit. Having an Early voltage detector 22 of same connection and structure as a driver circuit 21, and connected in parallel to the driver circuit 21, the current flowing in input transistor Q9 of the Early voltage detector 22 is detected. Output current (current IQ11) of Early voltage detector 22 is added to input current (current IQ5) of driver circuit 21. As a result, in input current (current IQ7) of current mirror circuit 25, current α due to Early voltage effects can be canceled. At the same time, current α due to Early voltage effects generated in input transistor Q5 of current mirror circuit 25 is prevented from appearing in output current (current IQ8) of current mirror circuit 25.
公开/授权文献
信息查询
IPC分类:
