Invention Grant
- Patent Title: Method for fabricating semiconductor package free of substrate
- Patent Title (中): 制造不含衬底的半导体封装的方法
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Application No.: US11821269Application Date: 2007-06-22
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Publication No.: US07354796B2Publication Date: 2008-04-08
- Inventor: Chien-Ping Huang , Yu-Po Wang , Chih-Ming Huang
- Applicant: Chien-Ping Huang , Yu-Po Wang , Chih-Ming Huang
- Applicant Address: TW
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW
- Agency: Edwards Angell Palmer & Dodge LLP
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW92101197A 20030121
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.
Public/Granted literature
- US20070249101A1 Method for fabricating semiconductor package free of substrate Public/Granted day:2007-10-25
Information query
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