A thin film transistor array substrate includes a first conductive pattern group including a gate electrode of a thin film transistor and a gate line connected to the gate electrode; a semiconductor pattern defining a channel of the thin film transistor; a second conductive pattern group including source and drain electrodes of the thin film transistor and a data line crossing the gate line, a pixel area being defined by the data line crossing the gate line; a third conductive pattern group having a pixel electrode connected to the thin film transistor; and at least one dummy pattern disposed between at least one of the first to third conductive pattern groups and an adjacent one of the semiconductor patterns.