A plasma display panel includes: a front and a rear substrate which face each other and form a discharge space; address electrodes arranged on an upper surface of the rear substrate; a first dielectric layer formed on the upper surface of the rear substrate and covering the address electrodes; partition walls formed on the upper surface of the rear substrate and partitioning the discharge space to form discharge cells; a fluorescent layer formed on an upper surface of the first dielectric layer and on sidewalls of partition walls, and forming inner surfaces of the discharge cells; first and second sustain electrodes formed on a lower surface of the front substrate in each of the discharge cells in a direction perpendicular to the address electrodes; and a second dielectric layer formed on the lower surface of the front substrate to cover the sustain electrodes, and having protruding portions formed between the sustain electrodes and protruding into discharge cells.