发明授权
- 专利标题: Digital storage element architecture comprising dual scan clocks and preset functionality
- 专利标题(中): 包括双扫描时钟和预置功能的数字存储元件架构
-
申请号: US11172242申请日: 2005-06-30
-
公开(公告)号: US07375567B2公开(公告)日: 2008-05-20
- 发明人: Charles M. Branch , Steven C. Bartling
- 申请人: Charles M. Branch , Steven C. Bartling
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Alan K. Stewart; W. James Brady; Frederick J. Telecky, Jr.
- 主分类号: H03K3/356
- IPC分类号: H03K3/356
摘要:
A digital storage element comprising a master transparent latch that receives functional data from a data input port and scan data from a scan input port and comprises a master feedback loop with a first transistor coupled to the master feedback loop. The first transistor also is coupled to electrical ground. The digital storage element also comprises a slave transparent latch coupled to the master transparent latch, the slave transparent latch comprising dedicated functional data and scan data output ports, a slave feedback loop and a second transistor coupled to the slave feedback loop. The second transistor is coupled to electrical ground. When a clock signal is in a first state, the first single transistor is activated to preset the digital storage element. When the clock signal is in a second state, the second single transistor is activated to preset the digital storage element.
公开/授权文献
信息查询
IPC分类: