发明授权
US07375567B2 Digital storage element architecture comprising dual scan clocks and preset functionality 有权
包括双扫描时钟和预置功能的数字存储元件架构

Digital storage element architecture comprising dual scan clocks and preset functionality
摘要:
A digital storage element comprising a master transparent latch that receives functional data from a data input port and scan data from a scan input port and comprises a master feedback loop with a first transistor coupled to the master feedback loop. The first transistor also is coupled to electrical ground. The digital storage element also comprises a slave transparent latch coupled to the master transparent latch, the slave transparent latch comprising dedicated functional data and scan data output ports, a slave feedback loop and a second transistor coupled to the slave feedback loop. The second transistor is coupled to electrical ground. When a clock signal is in a first state, the first single transistor is activated to preset the digital storage element. When the clock signal is in a second state, the second single transistor is activated to preset the digital storage element.
信息查询
0/0