发明授权
US07379364B2 Sensing a signal in a two-terminal memory array having leakage current
有权
感测具有漏电流的双端存储器阵列中的信号
- 专利标题: Sensing a signal in a two-terminal memory array having leakage current
- 专利标题(中): 感测具有漏电流的双端存储器阵列中的信号
-
申请号: US11583446申请日: 2006-10-19
-
公开(公告)号: US07379364B2公开(公告)日: 2008-05-27
- 发明人: Chang Hua Siau , Christophe Chevallier , Darrell Rinerson
- 申请人: Chang Hua Siau , Christophe Chevallier , Darrell Rinerson
- 专利权人: Unity Semiconductor Corporation
- 当前专利权人: Unity Semiconductor Corporation
- 主分类号: G11C7/02
- IPC分类号: G11C7/02
摘要:
A two-terminal memory array includes a plurality of first and second conductive traces. An address unit operatively applies a select voltage across a selected pair of the first and second conductive traces and applies a non-select voltage potential to unselected traces. A total current flowing in the selected first conductive trace and a leakage current flowing through unselected second conductive traces are sensed by a sense unit in a one cycle or a two cycle pre-read operation. The total and leakage currents can be combined with a reference signal to derive a data signal indicative of one of a plurality of conductivity profiles that represent stored data. The conductivity profiles can be stored in a resistive state memory element that is electrically in series with the selected first and second conductive traces.
公开/授权文献
信息查询