Invention Grant
- Patent Title: Memory module and signal line arrangement method thereof
- Patent Title (中): 存储模块及其信号线排列方法
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Application No.: US11357500Application Date: 2006-02-17
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Publication No.: US07390973B2Publication Date: 2008-06-24
- Inventor: Chil-Nam Yoon , Kwang-Seop Kim , Do-Hyung Kim , Jae-Jun Lee , Ki-Hyun Ko
- Applicant: Chil-Nam Yoon , Kwang-Seop Kim , Do-Hyung Kim , Jae-Jun Lee , Ki-Hyun Ko
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello LLP
- Priority: KR10-2005-0021552 20050315
- Main IPC: H05K1/16
- IPC: H05K1/16

Abstract:
The pesent invention discloses a memory module and a signal line arrangement method thereof. The memory module includes memory chips mounted on both sidees in a mirror form; and a printed circuit board (PCB) having same signal applying contact pads arranged on both sodes which same signal applying balls of the memory chips contact in the mirror form, wherein a via is formed at a location close to the same signal applying contact pad of one side among the same signal applying contact pads arranged on both sides in the mirror form, the via connecting the other side to the signal line of one side, and a signal transmitted from the other side is connected to a contact junction, the contact junction is connected to the same signal applying contact pad of the other side, the contact junction is connected to the via of the other side, and the via of one side is connected to the same signal applying contact pad of one side.
Public/Granted literature
- US20060207788A1 Memory module and signal line arrangement method thereof Public/Granted day:2006-09-21
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