Invention Grant
- Patent Title: Method and lithographic structure for measuring lengths of lines and spaces
- Patent Title (中): 测量线和空间长度的方法和光刻结构
-
Application No.: US10840922Application Date: 2004-05-07
-
Publication No.: US07393619B2Publication Date: 2008-07-01
- Inventor: Yuji Yamaguchi
- Applicant: Yuji Yamaguchi
- Agent Peter Zawilski
- Main IPC: G03F9/00
- IPC: G03F9/00

Abstract:
There is a structure and method for measuring the lengths of lines and spaces in semiconductor process. In an example embodiment, a lithographic structure (400) comprises, a frame (450). The frame includes a top inside edge, a top outside edge, a bottom inside edge, a bottom outside edge, a left inside edge, a left outside edge, a right inside edge, and a right outside edge. There is a first array of lines (430) and spaces, the first array having end of lines (420b) and end of spaces (430a). The lines have a first line width and the spaces have a first space width; the end of spaces are at a first distance (10) from the top outside edge of the frame (450), the end of lines are at a second distance (20) from the top outside edge of the frame (450). A first opening (410a) is a third distance (30) from the bottom outside edge of the frame and a second opening (410b) is a fourth distance (40) from the bottom outside edge of the frame.
Public/Granted literature
- US20050250025A1 Method and lithographic structure for measuring lengths of lines and spaces Public/Granted day:2005-11-10
Information query