发明授权
- 专利标题: Semiconductor memory device which prevents destruction of data
- 专利标题(中): 防止数据破坏的半导体存储器件
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申请号: US11498142申请日: 2006-08-03
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公开(公告)号: US07394691B2公开(公告)日: 2008-07-01
- 发明人: Noboru Shibata , Hiroshi Sukegawa
- 申请人: Noboru Shibata , Hiroshi Sukegawa
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- 优先权: JP2005-234719 20050812
- 主分类号: G11C11/34
- IPC分类号: G11C11/34 ; G11C7/00 ; G11C29/00
摘要:
A plurality of memory cells each storing n values (n is a natural number which is not smaller than 3) are arranged in a matrix form in a memory cell array, and each memory cell is connected with a word line and a bit line. Each memory cell stores the n-valued data by a first write operation and a second write operation. A read section sets a potential of a word line, and reads data from a memory cell in the memory cell array. If data read by the read section and written in the second write operation includes an uncorrectable error, a control section changes a potential of a word line supplied to the read section when reading data written in the first write operation.
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