- 专利标题: Seed generating circuit, random number generating circuit, semiconductor integrated circuit, IC card, and information terminal equipment
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申请号: US10761326申请日: 2004-01-22
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公开(公告)号: US07395288B2公开(公告)日: 2008-07-01
- 发明人: Shinobu Fujita , Tetsuro Iwamura
- 申请人: Shinobu Fujita , Tetsuro Iwamura
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- 优先权: JP2003-019732 20030129
- 主分类号: G06F7/02
- IPC分类号: G06F7/02
摘要:
A random number generating circuit comprises: the seed generating circuit which generates a seed; and a pseudo random number circuit which generates pseudo random numbers based on the seed generated by the seed generating circuit. The seed generating circuit has: an oscillating circuit which oscillates continuously or intermittently, and which outputs a digital data sequence; a smoothing circuit which outputs time series data by controlling appearance frequencies of “0” and “1” in the digital data sequence outputted from the oscillating circuit; and a postprocessing circuit which generates one-bit seed by a computation using a plurality of bits included in the time series data.
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