发明授权
- 专利标题： Parallel Processor efficiently executing variable instruction word
- 专利标题（中）： 并行处理器有效执行可变指令字
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申请号： US09654527申请日： 2000-09-01
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公开(公告)号： US07401204B1公开(公告)日： 2008-07-15
- 发明人: Hideo Miyake , Atsuhiro Suga , Yasuki Nakamura , Yoshimasa Takebe
- 申请人： Hideo Miyake , Atsuhiro Suga , Yasuki Nakamura , Yoshimasa Takebe
- 申请人地址： JP Kawasaki
- 专利权人： Fujitsu Limited
- 当前专利权人： Fujitsu Limited
- 当前专利权人地址： JP Kawasaki
- 代理机构： Staas & Halsey LLP
- 优先权： JP11-281957 19991001
- 主分类号： G06F15/00
- IPC分类号： G06F15/00
摘要：
A parallel processor performs efficient parallel processing of one or more basic instructions contained in each of a plurality of instruction words delimited by instruction delimiting information. The processor includes: a plurality of instruction execution units performing processes in accordance with corresponding, supplied basic instructions in parallel; an instruction fetch unit fetching the instruction words one by one in accordance with the instruction delimiting information; and an instruction issue unit recognizing and, in accordance therewith, selecting each of the basic instructions contained in each of the instruction words fetched by the instruction fetch unit to a corresponding instruction execution unit to execute the basic instruction.
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