Invention Grant
US07404137B2 Method and related apparatus for performing error checking-correcting
有权
用于执行错误检查校正的方法和相关装置
- Patent Title: Method and related apparatus for performing error checking-correcting
- Patent Title (中): 用于执行错误检查校正的方法和相关装置
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Application No.: US10908555Application Date: 2005-05-17
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Publication No.: US07404137B2Publication Date: 2008-07-22
- Inventor: Jiing Lin , Iris Jiang , Jie Ding
- Applicant: Jiing Lin , Iris Jiang , Jie Ding
- Applicant Address: TW Hsin-Tien, Taipei Hsien
- Assignee: VIA Technologies Inc.
- Current Assignee: VIA Technologies Inc.
- Current Assignee Address: TW Hsin-Tien, Taipei Hsien
- Agent Winston Hsu
- Priority: TW93135158A 20041116
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
A method and related apparatus for performing error checking-correcting (ECC). The method divides a memory space provided by a memory into an ECC range and a non-ECC range. When data is read or written, the method determines the address of data is within the ECC range or the non-ECC range so as to decide whether error checking-correcting is performed on the data.
Public/Granted literature
- US20060117239A1 METHOD AND RELATED APPARATUS FOR PERFORMING ERROR CHECKING-CORRECTING Public/Granted day:2006-06-01
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