发明授权
US07409530B2 Method and apparatus for compressing VLIW instruction and sharing subinstructions 有权
用于压缩VLIW指令和共享子指令的方法和装置

Method and apparatus for compressing VLIW instruction and sharing subinstructions
摘要:
A VLIW instruction format is introduced having a set of control bits which identify subinstruction sharing conditions. At compilation the VLIW instruction is analyzed to identify subinstruction sharing opportunities. Such opportunities are encoded in the control bits of the instruction. Before the instruction is moved into the instruction cache, the instruction is compressed into the new format to delete select redundant occurrences of a subinstruction. Specifically, where a subinstruction is to be shared by corresponding functional processing units of respective clusters, the subinstruction need only appear in the instruction once. The redundant appearance is deleted. The control bits are decoded at instruction parsing time to route a shared subinstruction to the associated functional processing units.
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