Invention Grant
- Patent Title: Architecture combining a continuous-time stage with a switched-capacitor stage for digital-to-analog converters and low-pass filters
- Patent Title (中): 将连续时段与开关电容器级相结合，用于数模转换器和低通滤波器
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Application No.: US11616468Application Date: 2006-12-27
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Publication No.: US07423573B2Publication Date: 2008-09-09
- Inventor: Paul A. Baginski , Robert Adams , Khiem Nguyen
- Applicant: Paul A. Baginski , Robert Adams , Khiem Nguyen
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Gauthier & Connors LLP
- Main IPC: H03M1/66
- IPC: H03M1/66
Abstract:
A digital to analog converter (DAC) includes a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on the input signal. The first continuous-time stage outputs a first output signal. A second switched-capacitor stage receives the first output signal and performs switched-capacitor filtering of the first output signal. The second switched-capacitor stage outputs a second output signal that is sent to a low pass filter to form a continuous analog signal associated with the digital signal.
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