发明授权
US07429786B2 Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides
有权
半导体封装包括第二衬底并且在上侧和下侧具有暴露的衬底表面
- 专利标题: Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides
- 专利标题(中): 半导体封装包括第二衬底并且在上侧和下侧具有暴露的衬底表面
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申请号: US11394635申请日: 2006-03-31
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公开(公告)号: US07429786B2公开(公告)日: 2008-09-30
- 发明人: Marcos Karnezos , Flynn Carson
- 申请人: Marcos Karnezos , Flynn Carson
- 申请人地址: SG Singapore
- 专利权人: Stats Chippac Ltd.
- 当前专利权人: Stats Chippac Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: H01L23/02
- IPC分类号: H01L23/02 ; H05K1/18
摘要:
A semiconductor package subassembly includes a die affixed to, and electrically interconnected with, a die attach side of a first package substrate, and a second substrate having a first side and a second (“land”) side, mounted over the first package with the first side of the second substrate facing the die attach side of the first package substrate, and supported by a spacer or a spacer assembly. Z-interconnection of the package and the substrate is by wire bonds connecting the first and second substrates. The assembly is encapsulated in such a way that both the land side of the second substrate (one side of the assembly) and a portion of the land side of the first package substrate (on the opposite side of the assembly) are exposed, so that second level interconnection and interconnection with additional components may be made.
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