Invention Grant
US07440866B2 System and method for validating an input/output voltage of a target system
有权
用于验证目标系统的输入/输出电压的系统和方法
- Patent Title: System and method for validating an input/output voltage of a target system
- Patent Title (中): 用于验证目标系统的输入/输出电压的系统和方法
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Application No.: US11140722Application Date: 2005-05-31
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Publication No.: US07440866B2Publication Date: 2008-10-21
- Inventor: John A. Maher , Mitchell Grant Poplack
- Applicant: John A. Maher , Mitchell Grant Poplack
- Applicant Address: US CA San Jose
- Assignee: Quickturn Design Systems Inc.
- Current Assignee: Quickturn Design Systems Inc.
- Current Assignee Address: US CA San Jose
- Agency: Orrick, Herrington & Sutcliffe LLP
- Main IPC: G06F19/00
- IPC: G06F19/00 ; G01R27/28 ; G01R31/00 ; G01R31/14

Abstract:
A target interface system for interfacing selected components of a communication system and methods for manufacturing and using same. Being reconfigurable to support an extensive range of conventional input/output technologies, the target interface system downloads a selected image associated with a desired input/output technology prior to runtime. The selected image identifies an appropriate output driver supply voltage, and any auxiliary voltages are controlled as functions of the output driver supply voltage to limit voltage inconsistencies. Defaulting each voltage to its least dangerous state when unprogrammed, the target interface system subsequently monitors the voltages, disabling the input/output connections if a problem is detected. The target interface system likewise detects when a selected system component is absent, unpowered, and/or wrongly powered and provides contention detection. Thereby, the target interface system can facilitate communication among the system components while inhibiting damage to the target interface system and/or the system components.
Public/Granted literature
- US20050267728A1 System and method for reliably supporting multiple signaling technologies Public/Granted day:2005-12-01
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