- 专利标题: Memory module with parallel testing
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申请号: US11811551申请日: 2007-06-11
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公开(公告)号: US07441167B2公开(公告)日: 2008-10-21
- 发明人: Youn-Cheul Kim , Hee-Joo Choi , Kae-Won Ha , Joon-Hee Lee
- 申请人: Youn-Cheul Kim , Hee-Joo Choi , Kae-Won Ha , Joon-Hee Lee
- 申请人地址: KR Suwon-si
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si
- 代理商 Monica H. Choi
- 优先权: KR2004-19628 20040323; KR2004-70025 20040902
- 主分类号: G11C29/00
- IPC分类号: G11C29/00
摘要:
Each memory chip of a memory module tests a total of N data bits from X memory blocks for efficient testing and outputs N/X data bits from one of the memory blocks. A memory module includes a plurality of memory chips and a plurality of comparison units. Each comparison unit is disposed within a respective memory chip for testing a plurality of data bits from a plurality of memory blocks. In addition, each comparison unit outputs data bits from one of the memory blocks within the respective memory chip.
公开/授权文献
- US20080005631A1 Memory module with parallel testing 公开/授权日:2008-01-03
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