发明授权
US07443240B2 AM intermediate frequency variable gain amplifier circuit, variable gain amplifier circuit and its semiconductor integrated circuit
失效
AM中频可变增益放大器电路,可变增益放大器电路及其半导体集成电路
- 专利标题: AM intermediate frequency variable gain amplifier circuit, variable gain amplifier circuit and its semiconductor integrated circuit
- 专利标题(中): AM中频可变增益放大器电路,可变增益放大器电路及其半导体集成电路
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申请号: US10580167申请日: 2004-11-11
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公开(公告)号: US07443240B2公开(公告)日: 2008-10-28
- 发明人: Hiroshi Katsunaga , Hiroshi Miyagi
- 申请人: Hiroshi Katsunaga , Hiroshi Miyagi
- 申请人地址: JP Kariya-Shi JP Joetsu-Shi
- 专利权人: Kabushiki Kaisha Toyota Jidoshokki,Niigata Seimitsu Co., Ltd.
- 当前专利权人: Kabushiki Kaisha Toyota Jidoshokki,Niigata Seimitsu Co., Ltd.
- 当前专利权人地址: JP Kariya-Shi JP Joetsu-Shi
- 代理机构: Morgan & Finnegan, LLP
- 优先权: JP2003-389693 20031119
- 国际申请: PCT/JP2004/016774 WO 20041111
- 国际公布: WO2005/050834 WO 20050602
- 主分类号: H03F3/45
- IPC分类号: H03F3/45
摘要:
It is an object of the present invention to provide a variable gain amplifier circuit operable with a low power supply voltage and with less noise generated inside the circuit. In the variable gain amplifier circuit, a third MOS transistor is connected between the respective sources of two MOS transistors constituting a differential amplifier circuit and to the gate of the third MOS transistor, and a DC bias voltage for operating the third MOS transistor in a non-saturated region is supplied. If the output voltage of an AM intermediate frequency variable gain amplifier circuit increases, a control voltage for reducing the resistance between the source and drain of the third MOS transistor is applied to reduce the gain of the AM intermediate frequency variable gain amplifier circuit.
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