发明授权
- 专利标题： Self-synchronous FIFO memory device
- 专利标题（中）： 自同步FIFO存储器件
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申请号： US10636698申请日： 2003-08-08
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公开(公告)号： US07463640B2公开(公告)日： 2008-12-09
- 发明人: Tsuyoshi Muramatsu , Hidekazu Yamanaka , Atsushi Tokura , Takuji Urata
- 申请人： Tsuyoshi Muramatsu , Hidekazu Yamanaka , Atsushi Tokura , Takuji Urata
- 申请人地址： JP Osaka
- 专利权人： Sharp Kabushiki Kaisha
- 当前专利权人： Sharp Kabushiki Kaisha
- 当前专利权人地址： JP Osaka
- 代理机构： Birch, Stewart, Kolasch & Birch, LLP
- 优先权： JPP2002-231787 20020808
- 主分类号： H04L12/28
- IPC分类号： H04L12/28
摘要：
A self-synchronous FIFO memory device (100) has a structure in which n self-synchronous data transmission lines (111-11n) are arrayed in parallel. An input control section (101) selects one of the n self-synchronous data transmission lines, and mediates the reception and delivery of a first transfer request signal, a first acknowledge (transfer instruction) signal and data between the selected self-synchronous data transmission line and a self-synchronous data transmission line of a preceding-stage section. Further, an output control section (102) selects one of the n self-synchronous data transmission lines, and mediates the reception and delivery of a second transfer request signal, a second acknowledge (transfer instruction) signal and data between the selected self-synchronous data transmission line and a self-synchronous data transmission line of a succeeding-stage section.
公开/授权文献
- US20040027909A1 Self-synchronous FIFO memory device 公开/授权日：2004-02-12
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