A processor boot-up controller includes: a volatile memory connected to a nonvolatile memory; a selector, which transfers boot-up codes to the volatile memory from the nonvolatile memory; a controller for the nonvolatile memory configured from a boot-up control sequencer, which transmits CPU read-in data to the CPU and brings the CPU into a wait state until boot-up code transfer completes; and an error detection and correction unit connected to the external CPU and the nonvolatile memory. The processor boot-up controls the CPU by reading data from the nonvolatile memory. The processor enables the CPU to access a SRAM in the shortest time in sync with the SRAM's ready timing, resulting in a reduction of average system boot-up time. An information processing system can use the controller for example for a nonvolatile memory, a microprocessor boot-up controller, and multi-valued nonvolatile memory.