发明授权
- 专利标题: Method for fabricating an SOI device
- 专利标题(中): SOI器件的制造方法
-
申请号: US11133969申请日: 2005-05-20
-
公开(公告)号: US07465639B1公开(公告)日: 2008-12-16
- 发明人: Mario M. Pelella , Richard K. Klein , James Werking
- 申请人: Mario M. Pelella , Richard K. Klein , James Werking
- 申请人地址: US TX Austin
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: Ingrassia Fisher & Lorenz, P.C.
- 主分类号: H01L21/20
- IPC分类号: H01L21/20
摘要:
A method is provided for fabricating a silicon on insulator (SOI) device that includes a silicon substrate, a buried insulator layer overlying the silicon substrate, and a monocrystalline silicon layer overlying the buried insulator layer. The method comprises the steps of forming an MOS capacitor coupled between a first voltage bus and a second voltage bus. The MOS capacitor has a gate electrode material forming a first plate of the MOS capacitor and an impurity doped region in the monocrystalline silicon layer beneath the gate electrode material forming a second plate of the MOS capacitor. The first voltage bus is coupled to the first plate of the capacitor and the second voltage bus is coupled to the second plate of the capacitor. The method further includes forming an electrical discharge path coupling the second plate of the MOS capacitor to the silicon substrate.
信息查询
IPC分类: