A method for forming a semiconductor transistor with an expanded top portion of a gate The gate is expanded through implanting atoms in the top portion of transistor's gate electrode region. The transistor formed includes a semiconductor region having two source/drain regions and a gate dielectric region formed on the channel region between the source/drain regions. The gate electrode region is formed on the gate dielectric region. The gate electrode region is formed such that it is electrically insulated from the channel region by the gate dielectric region. The top of the gate electrode region formed is wider than the bottom of the gate electrode region.