Invention Grant
- Patent Title: Parallel processing device and parallel processing method
- Patent Title (中): 并行处理装置及并行处理方法
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Application No.: US10505718Application Date: 2004-02-13
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Publication No.: US07480785B2Publication Date: 2009-01-20
- Inventor: Toshishige Shimamura , Hiroki Morimura , Koji Fujii , Satoshi Shigematsu , Katsuyuki Machida
- Applicant: Toshishige Shimamura , Hiroki Morimura , Koji Fujii , Satoshi Shigematsu , Katsuyuki Machida
- Applicant Address: JP Tokyo
- Assignee: Nippon Telegraph and Telephone Corporation
- Current Assignee: Nippon Telegraph and Telephone Corporation
- Current Assignee Address: JP Tokyo
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Priority: JP2003-146723 20030523; JP2003-271037 20030704
- International Application: PCT/JP2004/001526 WO 20040213
- International Announcement: WO2004/104819 WO 20041202
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F15/76
Abstract:
A row decoding circuit (171) outputs a select signal to a row set in a row range setting unit (172) to select a select signal line (103), processing results from processing circuits (102) on this row are output to a data output line (104), and a row adder (106) adds processing results output to a data output line (104) of a column set in a column range selector (105).
Public/Granted literature
- US20050259502A1 Parallel processing device and parallel processing method Public/Granted day:2005-11-24
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