发明授权
US07485524B2 MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the same
失效
包括具有倾斜的上表面的源/漏区的MOSFET及其制造方法
- 专利标题: MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the same
- 专利标题(中): 包括具有倾斜的上表面的源/漏区的MOSFET及其制造方法
-
申请号: US11425542申请日: 2006-06-21
-
公开(公告)号: US07485524B2公开(公告)日: 2009-02-03
- 发明人: Zhijiong Luo , Yung F. Chong , Judson R. Holt , Zhao Lun , Huilong Zhu
- 申请人: Zhijiong Luo , Yung F. Chong , Judson R. Holt , Zhao Lun , Huilong Zhu
- 申请人地址: US NY Armonk SG Singapore
- 专利权人: International Business Machines Corporation,Chartered Semiconductor Manufacturing Ltd.
- 当前专利权人: International Business Machines Corporation,Chartered Semiconductor Manufacturing Ltd.
- 当前专利权人地址: US NY Armonk SG Singapore
- 代理机构: Scully, Scott, Murphy & Presser, P.C.
- 代理商 Yuanmin Cai
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L21/336
摘要:
The present invention relates to improved metal-oxide-semiconductor field effect transistor (MOSFET) devices comprising source and drain (S/D) regions having slanted upper surfaces with respect to a substrate surface. Such S/D regions may comprise semiconductor structures that are epitaxially grown in surface recesses in a semiconductor substrate. The surface recesses preferable each has a bottom surface that is parallel to the substrate surface, which is oriented along one of a first set of equivalent crystal planes, and one or more sidewall surfaces that are oriented along a second, different set of equivalent crystal planes. The slanted upper surfaces of the S/D regions function to improve the stress profile in the channel region as well as to reduce contact resistance of the MOSFET. Such S/D regions with slanted upper surfaces can be readily formed by crystallographic etching of the semiconductor substrate, followed by epitaxial growth of a semiconductor material.
公开/授权文献
信息查询
IPC分类: