Invention Grant
US07490201B2 Method and bus prefetching mechanism for implementing enhanced buffer control 失效
用于实现增强缓冲区控制的方法和总线预取机制

Method and bus prefetching mechanism for implementing enhanced buffer control
Abstract:
A method, and bus prefetching mechanism are provided for implementing enhanced buffer control. A computer system includes a plurality of masters and at least one slave exchanging data over a system bus and the slave prefetches read data under control of a master. The master generates a continue bus signal that indicates a new or a continued request. The master generates a prefetch bus signal that indicates an amount to prefetch including no prefetching. The master includes a mechanism for continuing a sequence of reads allowing prefetching until a request is made indicating a prefetch amount of zero.
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