Invention Grant
- Patent Title: DMA descriptor queue read and cache write pointer arrangement
- Patent Title (中): DMA描述符队列读取和缓存写入指针排列
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Application No.: US11156228Application Date: 2005-06-17
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Publication No.: US07496699B2Publication Date: 2009-02-24
- Inventor: Steve L. Pope , Derek Roberts , David Riddoch , Ching Yu , John Mingyung Chiang , Der-Ren Chu
- Applicant: Steve L. Pope , Derek Roberts , David Riddoch , Ching Yu , John Mingyung Chiang , Der-Ren Chu
- Applicant Address: US CA Sunnyvale
- Assignee: Level 5 Networks, Inc.
- Current Assignee: Level 5 Networks, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Haynes Beffel & Wolfeld LLP
- Agent Warren S. Wolfeld
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F13/28 ; G06F12/00

Abstract:
Method and apparatus for retrieving buffer descriptors from a host memory for use by a peripheral device. In an embodiment, a peripheral device such as a NIC includes a plurality of buffer descriptor caches each corresponding to a respective one of a plurality of host memory descriptor queues, and a plurality of queue descriptors each corresponding to a respective one of the host memory descriptor queues. Each of the queue descriptors includes a host memory read address pointer for the corresponding descriptor queue, and this same read pointer is used to derive algorithmically the descriptor cache write addresses at which to write buffer descriptors retrieved from the corresponding host memory descriptor queue.
Public/Granted literature
- US20060288129A1 DMA descriptor queue read and cache write pointer arrangement Public/Granted day:2006-12-21
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